This page is brought to you by the engineering department of Synaptech Solutions Inc.
Many of the previous attempts at developing a reliable, robust PLC technology resulted in failures caused by overcomplicated designs. The problems faced when trying to communicate in a harsh environment, such as the power line, can be very daunting. These problems often cause designers to attempt overly complex methods, which result in being unreliable, difficult to work with, and extremely costly.
There are many common techniques used for digital communications, each with different strengths and weakness. Obviously, not all would be suitable for the harsh power line environment, so a select few that are commonly used in PLC are explained in further detail below:
Using FSK, the digital data is modulated with a simple carrier wave to produce a resultant
signal that contains two different frequencies. In this method, frequency A represents a
digital 0, while frequency B represents a digital 1.
The receiver in an FSK system must use hardware, such as a Phase Locked Loop (PLL), in order
to 'lock' on to the signal so that the filtered signal that is received can give an accurate
representation of the original signal. However, as is the case with the Costas loops used
in many PSK systems, the unpredictable noise present on the power line makes it very hard
for the PLL to maintain a stable 'lock', causing the incoming signal to become corrupted and
difficult to receive accurately.
A widely accepted and flexible technique called Binary-Phase Shift Keying (BPSK) can
be used effectively in a PLC solution. BPSK is a method of data encoding that uses phase
angle measurements of the incoming signal to determine the data being received. This is
accomplished by modulating the data being sent with a simple carrier wave. The receiving
hardware measures the phase angle of the incoming signal and uses the phase information to
determine a 1 or 0.
One problem often encountered when using BPSK is the need for the
receiver to be able to 'sync' to the incoming signal. In conventional BPSK, a specific
phase angle or range of phase angles represents a digital 1 or 0. If the receiver drifts
out of 'sync' with the incoming signal, the measured phase angles will fall out of the
accepted ranges and the data will be lost. Therefore, this type of system requires the
hardware to be able to continually readjust its sample timing in order to maintain its
'sync'. Most standard BPSK systems accomplish this continual syncing using hardware such
as a Costas Loop. This hardware is usually quite costly and proves to be ineffective as
the level of ambient noise in the system increases.
To overcome the unique communication obstacles within the power line as discussed earlier,
some non-standard modifications are required.
Differential BPSK uses conventional BPSK methods, but instead of representing digital
data with a specific phase angle value, digital data is defined as a specific value of
difference in phase angles between the current set of samples and the previous set of
samples.
This change in technique reduces the need for the hardware to 'sync' to the
incoming signal. Since the data is represented by differences in measured phase angle,
the only phase relationship that matters is that between the two most recent measurements.
If the two measurements have a phase difference close to 0 degrees, the data is considered
a 0. If the measurements differ by close to 180 degrees, the data is considered to be a 1;
or vice versa.
By reducing the need for the hardware to 'sync' to the incoming signal,
not only is there a cost savings in hardware, but the system is also able to handle higher
levels of ambient noise without losing the incoming data.
Error detection and correction is key to any reliable communication system. In the
harsh environment of the power line this is even more important, as the likelihood of
errors in data during transmit from source to destination is much more likely. Any errors
generated in a data packet need to be recognized and filtered out by the system.
Standard techniques such as CRC16 are widely available and used, but are not always
effective enough in a PLC environment. Error detection/correction techniques that
are specialized for the specific problems involved in effective PLC communication have
been developed by various companies and individuals. These type of techniques have
been implemented in the technology used in Synaptech's
solutions.
The following excerpt is taken directly from the thesis by L. Selander refered to above.
It presents an in-depth examination of some of the possible communication methods
suitable for the unique power line environment.
"Chapter 6 - A Modulation Method for the
Power-Line Communication Channel"
When analyzing the different PLC technologies available on the market today, one notices
two fundamental and distinct design approaches.
Certain well-known PLC technologies assume that the modulation and demodulation technique they implement is sufficient to
guarantee the minimal threshold of reliability that the consumer demands. Such
technologies would have us believe that they possess an ultra-sturdy Magic Bullet of
sorts that will lay waste to the obstacles on its path. Such technologies give little
importance to communication error management and do not implement Forward Error
Correction (FEC).
The second, and in our opinion, more prudent and more realistic approach assumes that a PL communication channel is an extremely difficult medium and
that communication errors will occur. Technologies conceived from that point of view
actively manage communication errors and implement, for example, an FEC technique.
Most Powerline Carrier systems and technologies offer some kind of error detection technique, (like Cyclic Redundancy Check
or CRC) so that erroneous packets are not interpreted. To further enhance the possibility of reliable communication
in hostile environments requires appropriate signaling schemes and error control
strategies. It is well known that Forward Error Correction (FEC) techniques can
significantly improve communication reliability.
Simply stated, FEC adds redundant information to the original message, allowing the receiver to retrieve the message even
if it contains erroneous bits. Facing line synchronous error bursts, (and particularly when
item 4 above is involved) typical non-FEC systems are often unable to deliver any usable
data. They only detect that the message has one or more errors, but are unable to correct
the erroneous bit(s) in the received packet, and reject the data packet. On intrabuilding
Powerline networks, Donaldson et al observed typical FEC coding gains of 15 dB at
10 –3 decoded Bit Error Rate (BER). (Our own experiments also show spectacular results.)
This is a very significant improvement of noise tolerance, (Signal-to-noise- ratio) as
well as other impairments tolerance like sudden impedance variation. "Stated differently,
FEC coding typically enhances decoded Bit Error Rate values three order of magnitude"
relative to systems not implementing any Forward Error Correction techniques.
FEC is a well known and relatively simple technique that significantly increases
communication reliability in noisy channels like Powerline. But FEC is not totally "free"! It
involves adding redundant data , meaning that more bits per message must be carried out.
In other words, it decreases the throughput (number of effective data bits delivered per
second) in noiseless environments, where FEC would not be mandatory. But powerline is not
such an environment. In noisy networks, FEC can even increase the net throughput over
non-FEC systems, by reducing the need for packet repeating. In severe situations,
(particularly in presence of line synchronous impairments, causing error bursts) FEC
enabled products can often deliver data where other non-FEC products simply crash.